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The NXP analog product development boards provide an easy-to-use platform for evaluating NXP products. The boards support a range of analog, mixed-signal and power solutions. They incorporate monolithic integrated circuits and system-in-package devices that use proven high-volume technology. NXP products offer longer battery life, a smaller form factor, reduced component counts, lower cost, and improved performance in powering state-of-the-art systems.
This page will guide you through the process of setting up and using the RDGD3162CSL3PEVM board.
The RDGD3162CSL3PEVM kit contents include:
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In addition to the kit contents, the following hardware is beneficial when working with this kit:
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This reference design requires a Windows PC workstation. Meeting these minimum specifications produces great results when working with this evaluation board.
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Installing software is necessary to work with this reference design. All listed software is available on the information page at: RDGD3162CSL3PEVM.
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The RDGD3162CSL3PEVM is a fully functional three-phase inverter evaluation board populated with six GD3162 gate drivers with fault management and supporting circuitry.
This board supports serial peripheral interface (SPI) daisy chain communication for programming and communication with three high-side gate drivers and three low-side gate drivers independently, or all six gate drivers at the same time.
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Overview of the RDGD3162CSL3PEVM board.
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Software for RDGD3162CSL3PEVM is distributed with the FlexGUI tool. Necessary firmware comes preinstalled on the FRDM-KL25Z with the kit.
Even if you intend to test with other software or PWM, it is recommended to install this software as a backup or to help debugging.
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RDGD3162CSL3PEVM with KITGD316xTREVB attached as shown in Figure 1 using Windows-based PC and FlexGUI software.
Note: Double pulse and short-circuit testing can be conducted on phase U only.
Suggested equipment needed for test:
Note: To enable short-circuit testing on phase U only, two resistors (R100, R121) must be removed from PWMALT phase U signals to disable dead time control on phase U gate drivers.
Figure 1. Evaluation setup using KITGD316xTREVB and FlexGUI
Figure 2. Evaluation setup using MPC5777C-DEVB MCU development kit
Figure 3. Evaluation setup using MPC5744P MCU development kit
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In addition to our 3-Phase Inverter Reference Design Using the GD3162 with BOSCH CSL B SiC page, you may also want to visit: